RF attenuation calculator
Tee attenuator calculator
Calculate the two equal series arms and center shunt resistor for a symmetrical matched Tee attenuator. Compare ideal values with an E24 starting point, estimated attenuation, VSWR and total pad power loss.
Calculated Tee network
Input series arm
25.97 Ω
Shunt resistor
35.14 Ω
Output series arm
25.97 Ω
Nearest E24 starting point
Each series arm: 27 Ω
Shunt: 36 Ω
Estimated attenuation: 10.067 dB
VSWR at design impedance: 1.031:1
Standard values are a procurement starting point. Re-check tolerance, frequency response and resistor power in the finished layout.
Ideal load power
100 mW
1:10 power ratio
Ideal pad dissipation
900 mW
Verify the physical design
This lumped, ideal model does not include resistor parasitics, PCB geometry, temperature rise or source/load mismatch.
Symmetrical Tee network
Two equal series arms surround one shunt resistor.
Matched source and load: 50 Ω
How to design a matched Tee pad
A symmetrical Tee calculation assumes equal real source and load impedances and an ideal, frequency-independent resistor network.
- 01
Set the reference impedance
Use the impedance that both ports are intended to see, commonly 50 Ω or 75 Ω in RF systems.
- 02
Enter positive insertion loss
Enter attenuation as a positive dB value. The calculator converts it to the voltage ratio K.
- 03
Calculate the two resistor values
Both series arms use the same resistance; the center shunt resistor connects their junction to ground.
- 04
Round and verify the realized pad
Preferred resistor values change both loss and match. Review the estimated attenuation and VSWR after rounding.
Symmetrical Tee attenuator equations
For equal source and load impedance Z₀, the two outer resistors are equal and the center resistor is a shunt to ground.
Voltage ratio
K = 10^(A dB / 20)
Each series arm
Rseries = Z₀ × (K − 1) / (K + 1)
Center shunt
Rshunt = 2 × Z₀ × K / (K² − 1)
Power ratio
Pin / Pout = 10^(A dB / 10)
Ideal pad dissipation
Ppad = Pin − Pout
The equations synthesize a reciprocal, symmetrical resistive two-port whose nominal input and output impedance are both Z₀ when terminated correctly. The E24 preview analyzes the rounded network as a two-port so its realized attenuation and mismatch can differ from the ideal target.
The power result is total pad dissipation, not the rating for each resistor. Determine individual resistor voltage and power under the real source, load and fault conditions before hardware selection.
Practical Tee attenuator checks
A correct DC resistance calculation is only the starting point for a broadband or power-handling attenuator.
Confirm both port impedances
The symmetrical equations do not transform between unequal source and load impedances.
Budget resistor tolerance
Small ratio errors create attenuation error and return loss. Precision networks can track better than separate general-purpose resistors.
Calculate individual resistor stress
The three resistors do not share dissipation equally. Verify steady-state, pulse and overload ratings separately.
Keep the shunt return short
Ground inductance and pad geometry can dominate the ideal resistor model as frequency rises.
Check the usable frequency range
Package capacitance, lead inductance and substrate effects can change insertion loss and VSWR.
Tee attenuator questions
What is a Tee attenuator?
It is a three-resistor pad shaped like a T: two series arms in the signal path and one shunt resistor from their center junction to ground.
Why are the two series resistors equal?
They are equal for a symmetrical pad designed between equal source and load impedances.
Why is attenuation entered as a positive dB number?
The tool treats the entered value as insertion loss magnitude. A 10 dB entry means the output power is one tenth of the input power in the ideal matched model.
Can the nearest E24 values be used directly?
They are a starting point. Review the displayed realized attenuation and VSWR, then consider E48, E96 or series/parallel combinations when the error is too large.
Does the result work at every frequency?
No. The equations are lumped and purely resistive. Component parasitics and PCB transmission-line effects limit broadband accuracy.
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