Key takeaways
- Compare the exact MLFB and generation, not only the 1511–1518 family label.
- Ports on one integrated switch are not separate PROFINET interfaces.
- The 1515 is the first representative model here with a second PN interface; the 1516 adds integrated PROFIBUS.
- Current 1517 and 1518 PN references make a large memory and performance step but do not include integrated PROFIBUS.
- Bit-operation time is not total scan time; compile, measure and test the representative project.
- Verify firmware, TIA Portal support, lifecycle and SIMATIC Memory Card requirements for the exact order number.
Choosing a SIMATIC S7-1500 CPU is not a matter of moving up a single performance ladder. The family number is only the starting point. The exact order number determines the CPU generation, work-memory split, integrated interfaces, firmware level and engineering-system requirements. A 1516 can therefore be the better engineering choice than a 1517 when integrated PROFIBUS is mandatory, while a 1515 may be the first meaningful step when two separate PROFINET networks are required.
This comparison uses representative Siemens standard CPUs available in the current product generation: 1511-1 PN 6ES7511-1AL03-0AB0, 1513-1 PN 6ES7513-1AM03-0AB0, 1515-2 PN 6ES7515-2AN03-0AB0, 1516-3 PN/DP 6ES7516-3AP03-0AB0, 1517-3 PN 6ES7517-3AQ10-0AB0 and 1518-3 PN 6ES7518-3AT10-0AB0. The values are a selection snapshot, not a substitute for the device manual and current Industry Mall entry for the exact MLFB.
Current S7-1500 CPU comparison table
The table separates program and data work memory because the split matters when estimating whether a project fits. It also distinguishes physical ports from independent interfaces. Values shown are manufacturer specifications for the exact representative order numbers listed.
Representative standard CPUs and the differences that affect selection
| CPU / exact MLFB | Program / data work memory | Integrated interfaces | Bit operation reference | Selection signal |
|---|---|---|---|---|
| 1511-1 PN · 6ES7511-1AL03-0AB0 | 300 KB / 1.5 MB | 1× PN IRT with 2-port switch | 6 ns | Compact single-network machine control |
| 1513-1 PN · 6ES7513-1AM03-0AB0 | 600 KB / 2.5 MB | 1× PN IRT with 2-port switch | 6 ns | More memory, same basic network pattern |
| 1515-2 PN · 6ES7515-2AN03-0AB0 | 1 MB / 4.5 MB | 1× PN IRT (2 ports) + 1× PN RT | 6 ns | First step here with two separate PN interfaces |
| 1516-3 PN/DP · 6ES7516-3AP03-0AB0 | 2 MB / 7.5 MB | PN IRT (2 ports) + PN RT + PROFIBUS DP | 6 ns | More memory plus integrated DP |
| 1517-3 PN · 6ES7517-3AQ10-0AB0 | 4 MB / 50 MB | 2× PN IRT (2 ports each) + Ethernet | 0.6 ns | Large data-memory and performance step; no integrated DP |
| 1518-3 PN · 6ES7518-3AT10-0AB0 | 12 MB / 150 MB | 2× PN IRT (2 ports each) + Ethernet | 0.3 ns | Highest capacity and bit-performance reference in this set |
The most important pattern is not that every row is uniformly faster than the previous one. In this current set, the 1511 through 1516 all carry a 6 ns reference for bit operations. The meaningful changes across those models are primarily memory capacity and interface architecture. The newer 1517-3 PN and 1518-3 PN introduce a much larger data-memory and execution-performance step.
Start with constraints, not the model number
A useful comparison begins by eliminating CPUs that cannot satisfy non-negotiable requirements. Safety, redundancy, extended motion functions, integrated I/O and multilingual high-level programming are variant decisions. Network separation and an installed PROFIBUS segment are architecture decisions. Only after these gates should memory and execution margin determine how far up the range to move.
1. Select the required CPU variant
The standard 1511-to-1518 names do not describe the whole S7-1500 portfolio. Compact C CPUs include onboard I/O. F CPUs are for fail-safe applications. T CPUs add an extended motion-control scope, and TF models combine technology and fail-safe functions. R/H systems address redundancy or high availability. MFP models add a separate runtime environment for C/C++ applications. If one of these functions is mandatory, compare within that variant first rather than choosing a standard CPU and trying to add the requirement later.
2. Draw the network topology
Count independent interfaces, not RJ45 sockets. The two ports on a 1511 or 1513 form an integrated switch on one PROFINET interface. They are useful for line topology, but they do not create two independently configured automation networks. The representative 1515 adds a second PN interface; the 1516 adds PROFIBUS DP as well. The newer 1517 and 1518 PN references provide two PN IRT interfaces plus a further Ethernet interface, but these particular models do not include integrated PROFIBUS.
Size memory from the compiled project
Work memory is where executable code and runtime data must fit. Siemens specifies program and data work memory separately, so a total-memory figure can conceal the real constraint. Use the compiled TIA Portal project, not source-file size, to determine current consumption. Then include growth for diagnostics, communications, technology objects, recipes, trace activity, data logging and future changes.
The difference between the current 1511 and 1513 is a straightforward capacity increase while retaining the same one-interface pattern and the same listed bit-operation reference. The 1515 and 1516 add progressively more program and data memory. The new 1517 and 1518 references are a different scale: 50 MB and 150 MB of data work memory respectively. That capacity is useful only when the application can justify it; it should not replace a memory estimate.
Do not read 0.3 ns as the machine scan time
The quoted nanosecond value is a reference execution time for a bit operation. It is useful for comparing a defined characteristic, but it is not the complete program-cycle time. A real cycle also depends on instruction mix, data access, organization blocks, technology objects, communication load, diagnostics, interrupts and I/O update behavior.
A 1517 or 1518 can offer a substantial execution margin for complex control, motion and data-intensive applications. The release decision should still use measured cycle and communication load from a representative project. Confirm minimum, average and peak values, check the configured cycle monitor, and test fault or reconnection cases that can change load.
What each CPU is best evaluated for
CPU 1511-1 PN
Evaluate the 1511 for a compact machine or cell with one PROFINET network, a modest compiled project and no requirement for a second independent PN interface or integrated PROFIBUS. Its attraction is a small, clear architecture—not unlimited future growth. Confirm that memory and communication margin remain acceptable after diagnostics and the next planned machine option are included.
CPU 1513-1 PN
The 1513 keeps the same basic one-interface network architecture while doubling program memory from 300 KB to 600 KB and increasing data memory from 1.5 MB to 2.5 MB in the representative current generation. Choose it when the project needs that additional headroom but does not require the architectural step provided by the 1515.
CPU 1515-2 PN
The 1515 is a strong candidate when two separate PROFINET interfaces are part of the design—for example, a deterministic machine network and a separate cell or HMI connection. It also raises work memory to 1 MB program and 4.5 MB data. Verify the role and performance limits of each interface; “two PN interfaces” does not mean every function is identical on both.
CPU 1516-3 PN/DP
The 1516 is often an architecture choice for a plant that must retain integrated PROFIBUS while adding substantial memory and separate PN connectivity. Its 2 MB program and 7.5 MB data work memory provide more headroom than the 1515, but the listed bit-operation reference remains 6 ns in this generation. If DP is decisive, that interface may matter more than moving to a higher-numbered PN-only reference.
CPU 1517-3 PN
The new 1517-3 PN represents a large step in data work memory and bit-operation performance: 4 MB program, 50 MB data and a 0.6 ns reference. It also changes the integrated network pattern to two PN IRT interfaces plus an Ethernet interface. It should be justified by project scale, communication and data handling, motion requirements or measured execution margin—not selected merely as a generic premium option.
CPU 1518-3 PN
The 1518-3 PN extends the same broad new-generation interface pattern to 12 MB program and 150 MB data work memory with a 0.3 ns bit-operation reference. It is aimed at the most demanding applications in this set. If the plant needs integrated PROFIBUS or an MFP runtime, compare the exact 1518 variant rather than assuming the 1518-3 PN includes those features.
Lifecycle, firmware and TIA Portal are release criteria
An order number can be technically suitable and still be wrong for the installed engineering baseline. Confirm the exact MLFB, hardware version, firmware version and supported TIA Portal release together. Siemens’ comparison data for the current 1515, for example, distinguishes firmware and engineering support across generations. Replacement work also requires checking project conversion, spare strategy and whether the installed memory card or firmware package remains appropriate.
Treat lifecycle state as live data. Product pages can move from active to phase-out or cancellation, and Siemens may name a successor that is not a drop-in replacement for every project. Record the Industry Mall status and the equipment-manual edition used for the design review.
A selection worksheet that can survive design review
- 01
Freeze mandatory functions
State whether the application requires standard, compact, fail-safe, technology, redundant/high-availability or MFP capability. Eliminate incompatible variants before comparing capacity.
- 02
Draw the real topology
Show every PROFINET, Ethernet and PROFIBUS segment, the intended devices and whether separation is required. Count interfaces separately from switch ports.
- 03
Compile and measure
Record program and data work-memory use, configured devices and technology objects, cycle time, communication load and the worst operating state tested.
- 04
Add an explicit growth allowance
Define the expected options, data retention, trace/logging and future software scope. The allowance should be a documented engineering assumption, not an arbitrary larger CPU.
- 05
Verify lifecycle compatibility
Check exact MLFB, hardware and firmware versions, TIA Portal support, current lifecycle state and SIMATIC Memory Card requirements against current Siemens documentation.
- 06
Archive the evidence
Save the compiled utilization report, topology, test results and the manufacturer document editions used. This makes a later replacement or expansion decision reproducible.
Bottom line
For the current representative standard CPUs, 1511 and 1513 share a simple one-interface pattern; 1515 introduces a second PN interface; 1516 adds integrated PROFIBUS and more memory; and the new 1517 and 1518 PN references deliver a major memory and performance step with a different interface architecture. The correct CPU is the lowest model and exact variant that passes every functional, network, capacity, timing and lifecycle gate with documented margin.
