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Wiring ABZ encoders to PLC high-speed counters

A practical method for matching an incremental encoder to a PLC high-speed counter: identify A/B/Z behavior, verify the electrical interface, calculate input frequency, wire single-ended or differential signals, and commission direction and index functions without relying on wire colors alone.

Xindustra Editorial Team
Published November 3, 2025
Reviewed September 16, 2026
14 min read
Timing diagram showing quadrature A and B signals, an index Z window and the edge transitions used by x1, x2 and x4 counting

An incremental encoder and a PLC high-speed counter can both be labeled A, B and Z and still be electrically incompatible. The letters describe phase A, phase B and an index or reference signal. They do not tell you the supply voltage, output circuit, signal levels, required pull resistor, differential receiver, maximum input frequency or how the counter interprets the edges.

A defensible design therefore starts with the complete encoder and HSC part numbers. Obtain both wiring diagrams and electrical specifications before landing conductors. Isolate power under the site procedure, protect the circuit as specified by the manufacturers, and do not use this article as a substitute for the released machine drawings or the product manuals.

Four checks before any wiring

What A, B and Z actually do

A and B are periodic signals separated in phase. Their phase relationship lets the counter determine direction: in one direction A leads B, and in the other B leads A. Many counters can invert the interpreted direction in configuration, so the physical lead/lag convention and the configured direction must be documented together. Z is normally an index or reference pulse associated with a repeatable encoder position, often once per revolution, but its width, polarity and alignment are encoder-specific.

Timing diagram showing quadrature A and B signals, an index Z window and the edge transitions used by x1, x2 and x4 counting
Conceptual timing: the illustrated direction has A leading B. PLC configuration may invert direction, and the exact Z relationship must come from the encoder datasheet.

Signal function versus design question

SignalUsual roleWhat must be verified
APrimary incremental channelVoltage levels, output circuit, maximum frequency and terminal polarity
BQuadrature channel for directionSame electrical checks as A, plus phase relationship and direction configuration
Z / indexReference or preset eventPulse polarity, width, occurrence, A/B relationship and how the HSC uses the input
A−, B−, Z−Complementary signals on a differential interfacePair assignment, receiver standard, polarity and any required termination

In x1 quadrature mode, a counter normally uses one selected transition per A cycle. X2 uses two transitions, and x4 uses the transitions of both A and B. For a 1,024-pulse-per-revolution encoder, x4 decoding can produce 4,096 count increments per revolution. The module manual determines the exact convention and whether its published frequency limit refers to channel frequency, edge rate or another quantity.

Identify the electrical interface before adapting anything

The encoder datasheet may call its output NPN open collector, PNP open collector, push-pull, totem-pole, HTL, TTL or line driver. These names describe different output stages and voltage behavior. The PLC documentation may describe inputs as single-ended, sourcing, sinking, differential, RS-422 compatible, 5 V, 24 V or configurable. Compare the actual voltage and current limits rather than matching only the terminology.

Engineering comparison of open-collector, push-pull and differential line-driver encoder output circuits and the PLC-side checks required for each
The correct interface is a circuit-level match. An approved signal converter may be needed when the encoder and HSC are not directly compatible.

Common output circuits

Encoder outputElectrical behaviorPLC-side checksTypical design risk
NPN open collectorOutput transistor pulls the signal toward 0 V when activeCompatible input reference and a manufacturer-approved pull-up path when requiredWrong common or resistor value; slow rising edge at higher frequency
PNP open collectorOutput transistor sources current toward the positive supply when activeCompatible input reference and input current/threshold at the encoder voltageConnecting to an input intended for a different current direction
Push-pull / totem-poleActively drives both high and low statesOutput high/low levels, current limit and HSC input rangeAssuming a 24 V push-pull encoder can drive a 5 V-only input
Differential line driverProvides complementary pairs such as A+/A−Differential receiver compatibility, pair polarity, cable and terminationConnecting one side of each pair to a single-ended input without an approved method

Do not add a generic pull resistor

Calculate the input frequency before choosing the counter

For a rotary encoder specified in pulses per revolution, the frequency of one incremental channel is commonly estimated as PPR × RPM ÷ 60. A 1,024 PPR encoder at 3,000 rpm produces 51,200 pulses per second, or 51.2 kHz, on channel A. If the counter uses x4 decoding, the position value may change 4,096 times per revolution, but you must read the module manual before translating that into an input-frequency requirement.

Worked frequency check

Design inputExample valueResult or action
Encoder resolution1,024 PPRConfirm whether the manufacturer states pulses, cycles or counts per revolution
Maximum mechanical speed3,000 rpmUse the credible overspeed condition, not only normal production speed
A-channel frequency1,024 × 3,000 ÷ 6051.2 kHz
Configured resolutionx4 quadrature4,096 count increments per revolution, subject to the HSC definition
Hardware checkExact HSC mode and filterFrequency, minimum pulse width and phase separation must remain within specification

The digital input filter can remove short disturbances, but a filter time that is too long can also reject legitimate encoder pulses. Conversely, setting the shortest possible filter does not repair poor shielding, incorrect voltage levels or an unsuitable output circuit. Select the filter from the maximum legitimate pulse timing and the manufacturer's allowed settings, then verify at operating speed.

Wiring workflow for a new or replacement encoder

Document the connection in this order

  1. Record both complete part numbers. Capture the encoder suffix, cable or connector version, PLC CPU or HSC module, firmware and configured channel. Similar family names can hide different voltage and input variants.
  2. Separate supply requirements from signal levels. Confirm encoder supply voltage, current and protective requirements. Do not assume the signal amplitude equals the supply or that a module's sensor supply suits every encoder.
  3. Classify each output circuit. Identify NPN, PNP, push-pull or differential line driver and note the high/low voltage and current specifications. Record whether complementary outputs are present.
  4. Map functions to the exact HSC terminals. Create an A, B, Z, return/common, shield and protective-earth schedule from the two manufacturer diagrams. For differential wiring, keep each plus/minus conductor in its assigned twisted pair.
  5. Verify frequency and pulse timing. Calculate maximum channel frequency from resolution and overspeed, then compare the result with the selected HSC mode, minimum pulse width, phase separation and filter settings.
  6. Apply the documented EMC and cable rules. Use the specified cable type, routing, shield connection and termination. Keep encoder wiring away from switching power conductors according to the equipment and site standards.
  7. Review before energization. Check polarity, pair assignment, commons, conductor shields, protective devices and unused wires against the released drawing. Insulate unused conductors as required.

Single-ended open-collector or push-pull wiring

A single-ended channel is interpreted relative to a signal common. The connection can be valid only when the encoder's active and inactive levels satisfy the HSC thresholds and the current path is compatible. For open-collector outputs, determine whether the pull device is internal or external and whether it pulls to a voltage accepted by the HSC. For push-pull outputs, confirm both high and low levels and the permitted load current. Repeat the check independently for A, B and Z.

Differential line-driver wiring

A differential encoder presents complementary conductors for each channel. Wire A+ with A− as one pair, B+ with B− as one pair and Z+ with Z− as one pair to a compatible differential receiver. Preserve pair polarity and do not borrow a minus conductor as a general common. Use the cable impedance, termination and grounding arrangement required by the encoder and HSC documentation; a generic RS-422 label does not eliminate product-specific rules.

There is no universal one-end or both-end shield rule. Follow the encoder and HSC instructions together with the machine’s EMC and bonding design, including cabinet bonding and potential differences.

A single-ended connection using only A+, B+ and Z+ is an option only when both the encoder and HSC manuals explicitly support it. Otherwise, use the complementary pairs and compatible receiver described here.

Shield termination is an EMC design decision

Plan the Z input and homing behavior

The index signal provides a repeatable reference event, but the machine control still decides what that event means. A robust homing sequence commonly combines a coarse machine reference with the encoder index rather than treating any Z edge as a safe mechanical zero. Confirm which Z polarity is active, whether the pulse occurs once per revolution, and whether the HSC requires a particular relationship between Z and A/B.

This relationship can be hardware-specific. For example, Rockwell's 1746 high-speed counter documentation instructs users to select the complementary A, B and Z polarities so that Z is true while A and B are false for proper module operation. That rule is evidence for the named module, not a universal ABZ wiring rule. The exact HSC manual must govern the connection.

Commissioning without guessing

A staged commissioning check

  1. Observe at standstill. With the machine safe, monitor the raw counter and channel diagnostics. Count movement at rest points to noise, floating inputs, an incorrect reference or a wiring fault.
  2. Rotate slowly in the defined forward direction. Confirm that the count changes smoothly and in the intended sign. If not, correct the documented A/B mapping or the direction configuration—do not make undocumented field swaps.
  3. Confirm the index event. Observe Z at low speed, verify one expected event and test the reference or preset logic without enabling hazardous movement.
  4. Test through the operating speed range. Compare expected and observed counts at a known number of revolutions, including the maximum credible speed. Look for missed or extra counts rather than only checking that the value changes.
  5. Test fault behavior. Where the hardware supports it, verify broken-wire, missing-pulse, overflow and communication-fault responses. Confirm that control logic moves to the intended safe state.
  6. Record the final configuration. Save the wiring revision, encoder PPR definition, x1/x2/x4 mode, direction inversion, filter time, preset/index logic and measured full-speed result.

Troubleshooting symptoms by evidence

Symptom, test and likely direction

SymptomFirst evidence to collectLikely areas to inspect
No countMeasure encoder supply and A/B levels at the HSCWrong terminal mapping, incompatible voltage/interface, missing common or disabled HSC
Direction reversedObserve A/B phase order at low speedA/B mapping or configured direction inversion
Counts correct slowly but low at speedCalculate frequency and inspect waveform at the receiverInput bandwidth, filter time, open-collector edge rate, cable loading or noise
Count changes at standstillMonitor each channel and shield/reference voltageFloating input, poor bonding, interference or damaged cable
Z never registersMeasure Z pulse width, polarity and occurrenceWrong Z terminal/pair, filter too long, mode not configured or incompatible levels
Sudden jumps or invalid directionCapture A and B togetherPair reversal, crosstalk, inadequate phase separation or intermittent connection

Do not diagnose a high-speed signal with software alone

Why vendor examples must stay product-specific

Siemens S7-1200 documentation supports A/B-phase quadrature HSC modes and can use an additional reset input as encoder phase Z or home, but the available inputs and frequency depend on the exact CPU and configuration. Mitsubishi's FX5-2HC/ES is a dedicated differential line-driver counter module; its current hardware manual specifies 5 V RS-422-A-level phase inputs and mode-dependent frequency limits. Rockwell's 5034-ENC provides A, B and Z HSC inputs with selectable quadrature modes and published filter and pulse-width limits. Omron offers both open-collector and line-driver encoder/counter products. None of these examples makes one wiring diagram portable to a different family.

Bottom line

A reliable ABZ installation is not created by connecting three similarly named wires. It is created by matching two electrical circuits, proving the frequency margin, preserving signal pairs and references, configuring the counter deliberately, and testing the result through the full speed range. When a replacement encoder changes output type, voltage or pulses per revolution, treat it as an engineering change even if the shaft and connector appear to fit.

References

  1. PointMax high-speed counter / SSI encoder module user manual
  2. 1746 high-speed counter module user manual
  3. MELSEC iQ-F FX5-2HC/ES hardware manual
  4. SIMATIC S7-1200 programmable controller system manual
  5. OMRON rotary encoder technical information

Need help identifying an encoder or HSC module?

Send the complete encoder and PLC or counter-module part numbers, supply voltage, maximum speed, PPR and connector or wiring photos. We can help confirm product identity and sourcing options; final circuit design and commissioning remain with the qualified system integrator.

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